(1) Field of the Invention
The present invention relates to a power source generation circuit, and in particular to a power source generation circuit and an integrated circuit in which an internal power source voltage is generated at a high speed.
(2) Description of the Related Art
In the field of utility meters such as water meters which measure a volume of water used, there is a water meter system which uses a water sensor generating a pulse signal depending on a certain volume of water and an integrated circuit counting the number of pulses of the pulse signal and thereby measures a volume of water used. An example of the integrated circuit used in the water meter system is one which acquires electric power from the pulse signal itself outputted by the water sensor, whereby a battery-free circuit is implemented.
In miniaturized integrated circuits, a constant lower power source voltage (1.8 V, for example) is internally generated from a power source voltage (3.3 V, for example) supplied from the outside, and supplied as a power source voltage to logic circuits and memory circuits in the integrated circuit. In the case of the aforementioned battery-free integrated circuit, there is a need to generate an internal power source voltage of the integrated circuit at a high speed so that a sufficient level of power source voltage is acquired from a short pulse signal.
Thus, an example of the power source generation circuit in which an internal power source voltage is generated at a high speed is a technique described in Patent Document 1 (Japanese Unexamined Patent Application Publication No. 2001-306167).
FIG. 5 is a circuit diagram of a power source generation circuit 60 described in Patent Document 1. The power source generation circuit 60 includes a switch 61, a reference power source 62, a delay unit 63, a differential amplifier 64, resisters 65 and 66, and a capacitor 67.
In the conventional power source generation circuit 60, the output stage of the differential amplifier 64 has a configuration in which an output stage buffer having a lower output impedance is connected in parallel to an output stage buffer having a higher output impedance. A switch input turns ON the switch 61 to start up the reference power source 62. The switch input is also supplied to the delay unit 63; during a period taken for the received switch input to be outputted from the delay unit 63, the output stage buffer of the differential amplifier 64 having a lower output impedance is operated, thereby charging the capacitor 67 at a high speed to generate an internal power source voltage. After the lapse of the given period, when the switch input is outputted from the delay unit 63, only the output stage buffer having a higher output impedance is operated.